Arc mitigation in electrical power distribution system

A circuit 24 to mitigate arc failures in an electrical power distribution system 20 includes a solid state distribution system 30 connected to a power source l4 and a load 12, a solid state power controller (SSPC) 40 having a set of field effect transistors (FETs) 42 responsive to command signals fr...

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Bibliographic Details
Main Authors Peter James Handy, Ross Jonathan Williams
Format Patent
LanguageEnglish
Published 26.12.2018
Subjects
CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
ELECTRICITY
EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
GENERATION
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Summary:A circuit 24 to mitigate arc failures in an electrical power distribution system 20 includes a solid state distribution system 30 connected to a power source l4 and a load 12, a solid state power controller (SSPC) 40 having a set of field effect transistors (FETs) 42 responsive to command signals from the SSPC 40 wherein an arc (figure 3B, 56) in a wire bond 54 of a failed FET 44 can trigger a predetermined sequence to quench the arc and isolate remaining wire bond material in the failed FET 44 from contaminating a creepage path 50, enabling current to bypass the failed FET and maintain power to the load.
Bibliography:Application Number: GB20170009708