Encoding and decoding data to accommodate memory cells having stuck-at faults

• Main Authors: CYRIL GUYOT, QINGBO WANG, HESSAM MAHDAVIFAR, ROBERT EUGENIU MATEESCU, ZVONIMIR Z BANDIC, LUIZ M FRANCA-NETO
• Format: Patent
• Language: English
• Published: 30.04.2014
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; PHYSICS

A data storage system includes a memory circuit having memory cells and a control circuit that receives data bits provided for storage in the memory cells, where one or more of the memory cells has a stuck-at fault. The control circuit receives a first matrix M that may be generated using a block code, e.g. by taking the transpose of a parity check matrix of a BCH code. Each row of the first matrix corresponds to a unique one of the data bits. The control circuit generates a second matrix having only the rows of the first matrix that correspond to the data bits provided for storage in a subset of the memory cells having stuck-at faults. The control circuit generates a third matrix having linearly independent columns of the second matrix. The control circuit encodes the data bits to generate encoded data bits and redundant (e.g. index) bits using the third matrix. In other embodiments, the control circuit may include a decoder that receives encoded data bits, redundant bits and the first matrix M for regenerating the data bits. Decoding operations include generating a second matrix, a first vector and a second vector.