Self-aligned carbon electronics with embedded gate electrode

A device and method for device fabrication includes forming a buried gate electrode in a dielectric substrate and patterning a stack that includes a high dielectric constant layer, a carbon-based semi-conductive layer and a protection layer over the buried gate electrode. An isolation dielectric lay...

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Bibliographic Details
Main Authors JUN YUAN, SHU-JEN HAN, DECHAO GUO, KEITH KWONG HON WONG
Format Patent
LanguageEnglish
Published 22.07.2015
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Summary:A device and method for device fabrication includes forming a buried gate electrode in a dielectric substrate and patterning a stack that includes a high dielectric constant layer, a carbon-based semi-conductive layer and a protection layer over the buried gate electrode. An isolation dielectric layer formed over the stack is opened to define recesses in regions adjacent to the stack. The recesses are etched to form cavities and remove a portion of the high dielectric constant layer to expose the carbon-based semi-conductive layer on opposite sides of the buried gate electrode. A conductive material is deposited in the cavities to form self-aligned source and drain regions.
Bibliography:Application Number: GB20130020100