Method to reduce system idle power through system VR output adjustments during S0ix states

An electronic device includes a power control circuit to generate a power mode signal and a plurality of voltage regulators to receive the power mode signal. Each voltage regulator reduces an output voltage in response to the power mode signal, and the reduced output voltage of each voltage regulato...

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Bibliographic Details
Main Author DAVID W BROWNING
Format Patent
LanguageEnglish
Published 26.12.2012
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An electronic device includes a power control circuit to generate a power mode signal and a plurality of voltage regulators to receive the power mode signal. Each voltage regulator reduces an output voltage in response to the power mode signal, and the reduced output voltage of each voltage regulator is used to power a different circuit of or function to be performed in the electronic device.
Bibliography:Application Number: GB20110005257