Page table access by a graphics processor

A graphics processor requests access to memory locations in system memory. Without waiting for a cache miss it receives address information relating to a block of memory. The address information may be a mapping of virtual addresses used by the graphics processor to physical addresses in system memo...

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Main Authors DENNIS K MA, PETER C TONG, STEFAN A GOTTSCHALK, KEVIN J KRANZUSCH, SONNY S YEOH, COLYN S CASE, GARY D LORENSEN, ASHISH K KAUL, KAYMANN L WOO
Format Patent
LanguageEnglish
Published 06.02.2008
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Summary:A graphics processor requests access to memory locations in system memory. Without waiting for a cache miss it receives address information relating to a block of memory. The address information may be a mapping of virtual addresses used by the graphics processor to physical addresses in system memory. The graphics processor stores a page table entry corresponding to the block of memory in a local cache. It may store the page table entry in system memory. The data may be received at system power up. The address information may be locked in the cache. The request for access may be made to an operating system. The graphics processor may calculate physical addresses from virtual addresses in a given address range by adding an offset and use the page table entry in cache if the address is not in the range.
Bibliography:Application Number: GB20070013574