Method for utilizing more storage space on scarped flash memory chips by dividing the usable space into two or more logical areas of standard sizes

Scrap flash memory chips 11 with more bad blocks 12 than redundant blocks, are utilised by partitioning the useful storage 13, 14, 17 space, on a single chip, into two or more logically separated areas. Each area is has a different capacity 131, 141, 171 for storing data. The capacity of the areas i...

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Bibliographic Details
Main Authors HORACE CHEN, KHEIN-SENG PUA
Format Patent
LanguageEnglish
Published 25.07.2007
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:Scrap flash memory chips 11 with more bad blocks 12 than redundant blocks, are utilised by partitioning the useful storage 13, 14, 17 space, on a single chip, into two or more logically separated areas. Each area is has a different capacity 131, 141, 171 for storing data. The capacity of the areas is 2 , 2 and 2 where p, q and r are natural numbers, with p > q > r. The different areas can load data from each other via an application program. The areas may be write protected. Also disclosed is a method of utilising the flash memory of a single chip so as to use the optimum amount of storage space available on the chip. The method has the steps of formatting the chip and marking any bad blocks, calculating the available memory in the chip after excluding the bad blocks and then dividing the available memory into 2 or more data storage areas.
Bibliography:Application Number: GB20060001297