A method and device for improving utilization of a bus

An embodiment of a bus management device permits scheduling of transactions to allow concurrent execution of the transactions. Data bus usage is scheduled by setting shift register bits. Each position in the shift register corresponds to one clock cycle. When a current transaction is in a data phase...

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Bibliographic Details
Main Authors JOHN R MCVEY, DEE LEE CHOU
Format Patent
LanguageEnglish
Published 12.01.2005
Edition7
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:An embodiment of a bus management device permits scheduling of transactions to allow concurrent execution of the transactions. Data bus usage is scheduled by setting shift register bits. Each position in the shift register corresponds to one clock cycle. When a current transaction is in a data phase, the value in the shift register is used to determine when to begin a control phase of the next transaction so that a desired number of idle clock cycles are present between data bus usage time periods for successive transactions.
Bibliography:Application Number: GB20010006752