IMPROVEMENTS RELATING TO DATA PROCESSING SYSTEMS

• Main Authors: ROGER JOHN BOOM, MARTIN JOHN GOODIER, JOHN MICHAEL COTTON, DAVID COCKBURN COSSERAT
• Format: Patent
• Language: English
• Published: 12.07.1972
• Subjects: CALCULATING; COMPUTING; COUNTING; ELECTRIC COMMUNICATION TECHNIQUE; ELECTRIC DIGITAL DATA PROCESSING; ELECTRICITY; PHYSICS; SELECTING

1281167 Data processor PLESSEY TELECOMMUNICATIONS RESEARCH Ltd 24 Dec 1969 [2 Jan 1969] 193/69 Heading G4A In a data processing arrangement in which a number of different processing functions may be performed under the control of corresponding programme routines stored in unique storage areas, each storage area having an input data storage area for accommodating a single input data packet and an output data storage area for accommodating the resultant processed data packet, a number of further storage areas are provided each having a capacity of a number of data packets, a data input packet being transferred from a selected first further storage area to a selected input data storage area and the resultant processed data packet being transferred from the corresponding output data storage area to a selected second further storage area which may or may not be the same as the first further storage area. General.-As described the data processing arrangement consists of a number of similar data processing units each having its associated programme stored in a unique portion of a common memory which may be a core matrix. The further storage areas are also formed in the common memory, one being associated with each of the processors. Intercommunication between the processors may be by means of the data transmission system disclosed in Specification 1,168,476. Operation.-Each processor can perform an asynchronous routine by extracting a data packet from its associated further storage area and placing it in its input data storage area. The data is then processed and passed from the output storage area back into the further storage area. The transfers are made under microprogramme control and an alarm is set off if the processor attempts to insert a data word into a storage area which is full or attempts to extract a word from an empty storage area. If data transfer is required between a processor and a further storage area associated with another processor a "prepare for transfer" instruction is selected by the processor initiating the transfer and the data transmission system is activated. A fixed number of attempts are made to establish the connection and an alarm is activated if no connection is made. Data may be extracted from an external further storage area to be processed by the initiating processor and the result inserted in its associated further store, or alternatively, in the further storage area associated with another processor. When connections are established between processors the programme being run on the interrupted processor is stopped and the address of the next instruction being performed is stored; data transfer then occurs. The Specification describes in some detail the micro-programme steps involved in each of the transfer modes indicated above and also gives details of the instruction words used.