STRUCTURE D'ENCAPSULATION HERMETIQUE D'UN DISPOSITIF ET D'UN COMPOSANT ELECTRONIQUE

The structure (100) has a hermetically sealed cavity (110) for encapsulating a device (106), a complementary metal oxide semiconductor (CMOS) transistor produced on a substrate (102), and a getter material layer (108) covering the CMOS transistor. The device is selected from one of a microelectromec...

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Bibliographic Details
Main Authors BAILLIN XAVIER, PORNIN JEAN-LOUIS
Format Patent
LanguageFrench
Published 10.10.2014
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:The structure (100) has a hermetically sealed cavity (110) for encapsulating a device (106), a complementary metal oxide semiconductor (CMOS) transistor produced on a substrate (102), and a getter material layer (108) covering the CMOS transistor. The device is selected from one of a microelectromechanical system (MEMS) device, a nanoelectromechanical system (NEMS device), a micro-opto electromechanical system (MOEMS) device, and a nano-opto electromechanical system (NOEMS) device, and an infrared sensor. A dielectric layer (111) is placed between the transistor and the getter material layer. An independent claim is also included for a method for encapsulating the device and the electronic component in the cavity.
Bibliography:Application Number: FR20110059848