PROCEDE DE REDUCTION DU COURANT DE MODE COMMUN
The method involves applying voltage between an internal ground of an electrical circuit and the earth by using an electrical network. Additional voltage is applied between the internal ground and the earth by using an electronic component (21) interposed between the internal ground and the earth an...
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Main Author | |
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Format | Patent |
Language | French |
Published |
09.06.2017
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Subjects | |
Online Access | Get full text |
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Summary: | The method involves applying voltage between an internal ground of an electrical circuit and the earth by using an electrical network. Additional voltage is applied between the internal ground and the earth by using an electronic component (21) interposed between the internal ground and the earth and applied in parallel to a parasitic capacitor (15) existing between the internal ground and the earth, where the additional voltage opposes the voltage applied by the electrical network between the internal ground and the earth to reduce common mode current at frequency of the electrical network. The electronic component is an electronic component without a FET. An independent claim is also included for an electrical circuit assembly. |
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Bibliography: | Application Number: FR20110058279 |