DISPOSITIF DE MEMOIRE A SEMICONDUCTEURS

• Main Author: YOSHIAKI OUCHI, MASAMICHI ISHIHARA, TETSURO MATSUMOTO ET KAZUYUKI MIYAZAWA
• Format: Patent
• Language: French
• Published: 30.03.1984
• Subjects: INFORMATION STORAGE; PHYSICS; STATIC STORES

L'INVENTION CONCERNE UN DISPOSITIF DE MEMOIRE A SEMICONDUCTEURS.CE DISPOSITIF COMPREND UN RESEAU DE CELLULES DE MEMOIRE 1 COMPORTANT UNE PLURALITE DE CELLULES DE MEMOIRE SITUEES DANS DIFFERENTES MATRICES 1A-1D, UN CIRCUIT DE COMMUTATION G, G, G-G, G-G COMPORTANT UNE PLURALITE DE BORNES D'ENTREESORTIE MENAGEES DE MANIERE A CORRESPONDRE ET A ETRE RACCORDEES AUX BORNES D'ENTREESORTIE DUDIT RESEAU DE CELLULES DE MEMOIRE DE FACON BI-UNIVOQUE, DES BORNES DE COMMANDE ET UNE BORNE COMMUNE D'ENTREESORTIE, UN CIRCUIT D'ENTREESORTIE 8, 9 COMPORTANT DES BORNES D'ENTREESORTIE, UN CIRCUIT DE COMMANDE 5A, 5B, 6 DELIVRANT DES SIGNAUX DE COMMANDE ET UN CIRCUIT DE SELECTION 4, 7, 9 REALISANT UNE SELECTION EN FONCTION DE SIGNAUX D'ADRESSES ENVOYES AU CIRCUIT DE COMMANDE.APPLICATION NOTAMMENT AUX MEMOIRES RAM DYNAMIQUES. An address multiplex type system for a dynamic RAM includes a memory cell array having a plurality of memory cells which are simultaneously selected by signals output from an address decoder, a decoder, and a shift register. The dynamic RAM further includes a selecting circuit which receives a plurality of address signals applied externally through one of a plurality of pins of a package in a time-sharing manner and makes it possible to write or read data into or from one memory cell of the plurality of memory cells selected. The dynamic RAM can read out or write in serially data of a plurality of memory cells selected from the memory cell array when a shift register operates. The dynamic RAM can also read or write data serially into or from a plurality of memory cells selected from the memory cell array simply by connecting the pin to a predetermined potential. When the data is written or read serially, the pin arrangement of the package of a 256K bit dynamic RAM can be substantially the same as that of the package of a 64K bit dynamic RAM. Hence, compatibility can be established between the 256K bit dynamic RAM and a 64K bit dynamic RAM.