DISPOSITIF INTEGRE COMPRENANT UN THYRISTOR OU UN TRANSISTOR BIPOLAIRE AVEC COMMANDE DU BLOCAGE ET DU DEBLOCAGE PAR TRANSISTORS A EFFET DE CHAMP

MOSFET-gated bipolar transistor and thyristor integrated devices combining, as the respective turn-on and turn-off control devices, an enhancement mode MOSFET and a depletion mode MOSFET. The gates of the two MOSFETs are connected to a single device gate terminal. The conduction channel of the deple...

Full description

Saved in:
Bibliographic Details
Main Author MICHAEL STUART ADLER
Format Patent
LanguageFrench
Published 14.03.1986
Edition4
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
Online AccessGet full text

Cover

More Information
Summary:MOSFET-gated bipolar transistor and thyristor integrated devices combining, as the respective turn-on and turn-off control devices, an enhancement mode MOSFET and a depletion mode MOSFET. The gates of the two MOSFETs are connected to a single device gate terminal. The conduction channel of the depletion mode MOSFET is preferably an implanted region. With gate voltage of appropriate polarity applied, the depletion mode MOSFET is non-conducting and the enhancement mode MOSFET is conducting, biasing the included bipolar transistor or thyristor into conduction. With zero gate voltage applied, the depletion mode MOSFET conducts and the enhancement mode MOSFET is non-conducting, turning off the included bipolar transistor or thyristor. Significantly, only a single polarity gate input signal is required.
Bibliography:Application Number: FR19830005466