PROCEDE DE FABRICATION D'UN DISPOSITIF SEMI-CONDUCTEUR

Processes for forming a wafer having SOS structure are provided. A single crystal silicon layer is formed on a principal plane of a sapphire substrate. An amorphous portion is formed in a silicon layer leaving its surface portion of predetermined depth as it is and by injecting Si+ into the single c...

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Bibliographic Details
Main Author YAMICHI OHMURA
Format Patent
LanguageFrench
Published 27.06.1986
Edition4
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Processes for forming a wafer having SOS structure are provided. A single crystal silicon layer is formed on a principal plane of a sapphire substrate. An amorphous portion is formed in a silicon layer leaving its surface portion of predetermined depth as it is and by injecting Si+ into the single crystal silicon layer. This amorphous portion reaches the interface of sapphire substrate. A wafer thus formed is placed on a cooling table in a furnace. The substrate is fixedly bonded onto the cooling table with indium and cooled to a predetermined temperature. A temperature higher than that applied to the sapphire substrate is applied to the silicon layer including the amorphous portion using a heater arranged in the furnace and N2 gas flowing into the furnace. The SOS wafer is then returned to room temperature.
Bibliography:Application Number: FR19810010064