RESISTIVE RANDOM ACCESS MEMORY AND MANUFACTURING METHOD THEREFOR
This disclosure relates to a resistive random access memory and a manufacturing method thereof. The resistive random access memory includes a first electrode layer, a second electrode layer, and a resistive dielectric layer located between the first electrode layer and the second electrode layer. Th...
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Main Authors | , , , , |
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Format | Patent |
Language | English French German |
Published |
21.08.2024
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Subjects | |
Online Access | Get full text |
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Summary: | This disclosure relates to a resistive random access memory and a manufacturing method thereof. The resistive random access memory includes a first electrode layer, a second electrode layer, and a resistive dielectric layer located between the first electrode layer and the second electrode layer. The first electrode layer, the second electrode layer, and the resistive dielectric layer are of a sandwich structure. The second electrode layer includes a plurality of through holes, and the plurality of through holes are filled with electrode materials. This may form an annular electrode or a sawtooth electrode. Because an electrode with a target size is disposed at a target position, second electrodes are regular, even, and flat, and have a relatively small conductive filament forming area, so that a current providing position can be effectively controlled, and a position for generating a metal cation or an oxygen defect vacancy can be controlled to a maximum extent. In this way, generation randomness of a conductive filament is reduced, and shape uniformity of the conductive filament is improved, thereby improving performance consistency in resistive random access memories, for example, consistency of D2D and C2C. |
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Bibliography: | Application Number: EP20210968508 |