SEMICONDUCTOR DEVICE AND PREPARATION METHOD THEREFOR, INTEGRATED CIRCUIT, AND ELECTRONIC DEVICE

This application provides a semiconductor device and a preparation method thereof, an integrated circuit, and an electronic device. The semiconductor device includes a drain, a substrate, an epitaxial layer, and a semiconductor layer. The semiconductor layer includes a source region located on a sid...

Full description

Saved in:
Bibliographic Details
Main Authors NING, Runtao, HE, Linrong, HUANG, Kangrong, YANG, Wentao, XU, Gaochao
Format Patent
LanguageEnglish
French
German
Published 31.07.2024
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:This application provides a semiconductor device and a preparation method thereof, an integrated circuit, and an electronic device. The semiconductor device includes a drain, a substrate, an epitaxial layer, and a semiconductor layer. The semiconductor layer includes a source region located on a side that is at the semiconductor layer and that is away from the epitaxial layer. A trench extending to the epitaxial layer is disposed on a side that is of the source region and that is away from the epitaxial layer. A gate, an electrode plate, a first shield gate, and a second shield gate are disposed in the trench. The electrode plate is located between the first shield gate and the second shield gate. The trench is further filled with an oxidized layer structure. The first shield gate and the second shield gate are separately spaced from the electrode plate to form electrode plate capacitance. A first electrode is electrically connected to the electrode plate, and a second electrode is electrically connected to the shield gate structure. The first electrode is one of the source region, the drain, and the gate, the second electrode is one of the source region, the drain, and the gate, and the first electrode is different from the second electrode. The electrode plate capacitance can change output capacitance, Miller capacitance, or input capacitance to adjust a capacitance value and optimize performance of the semiconductor device.
Bibliography:Application Number: EP20230769430