SEMICONDUCTOR PACKAGE AND FABRICATION METHOD THEREOF

A semiconductor package (1) includes a package substrate (20), an interposer (200) on and electrically connected to the package substrate (20), a central logic die (101) disposed on and electrically connected to the interposer (200), peripheral function dies (102) disposed on and electrically connec...

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Bibliographic Details
Main Authors WONG, Te-Chi, TSAO, Pei-Haw
Format Patent
LanguageEnglish
French
German
Published 24.07.2024
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:A semiconductor package (1) includes a package substrate (20), an interposer (200) on and electrically connected to the package substrate (20), a central logic die (101) disposed on and electrically connected to the interposer (200), peripheral function dies (102) disposed on and electrically connected to the interposer (200) and located in proximity to the central logic die (101), and at least one dummy die (103) disposed between the central logic die (101) and the peripheral function dies (102) so as to form a rectangular shaped die arrangement. The at least one dummy die (103) is disposed at a corner position of the rectangular shaped die arrangement.
Bibliography:Application Number: EP20240151173