RESISTIVE MEMORY DEVICE INCLUDING VERTICAL STACK STRUCTURE, METHODS OF MANUFACTURING AND OPERATING THE SAME, AND ELECTRONIC APPARATUS INCLUDING THE RESISTIVE MEMORY DEVICE

Disclosed is a resistive memory device (CS) including a vertical stack of memory cells (MC), each memory cell comprising a gate electrode (140), a resistance change layer (124), a (semiconductor transistor) channel (132) between the gate electrode and the resistance change layer, an island structure...

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Main Authors KANG, Jooheon, AHN, Dongho, Yumin, KIM, HYUN, Seungdam, PARK, Garam, SONG, Hyunjae, WOO, Myunghun, KIM, Seyun, YANG, Seungyeul, LEE, Jinwoo
Format Patent
LanguageEnglish
French
German
Published 03.07.2024
Subjects
ELECTRICITY
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Abstract Disclosed is a resistive memory device (CS) including a vertical stack of memory cells (MC), each memory cell comprising a gate electrode (140), a resistance change layer (124), a (semiconductor transistor) channel (132) between the gate electrode and the resistance change layer, an island structure (128) between and in contact with the resistance change layer and the channel, and a gate insulating layer (136) between the gate electrode and the channel. Preferably, the island structure includes SiN, GaN, or an oxide having a greater absolute value of oxide formation energy than the resistance change layer. A method of fabricating such memory cells is also disclosed.
AbstractList Disclosed is a resistive memory device (CS) including a vertical stack of memory cells (MC), each memory cell comprising a gate electrode (140), a resistance change layer (124), a (semiconductor transistor) channel (132) between the gate electrode and the resistance change layer, an island structure (128) between and in contact with the resistance change layer and the channel, and a gate insulating layer (136) between the gate electrode and the channel. Preferably, the island structure includes SiN, GaN, or an oxide having a greater absolute value of oxide formation energy than the resistance change layer. A method of fabricating such memory cells is also disclosed.
Author HYUN, Seungdam
AHN, Dongho
WOO, Myunghun
PARK, Garam
KANG, Jooheon
YANG, Seungyeul
LEE, Jinwoo
SONG, Hyunjae
Yumin, KIM
KIM, Seyun
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– fullname: SONG, Hyunjae
– fullname: WOO, Myunghun
– fullname: KIM, Seyun
– fullname: YANG, Seungyeul
– fullname: LEE, Jinwoo
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DocumentTitleAlternate DISPOSITIF DE MÉMOIRE RÉSISTIVE COMPRENANT UNE STRUCTURE D'EMPILEMENT VERTICAL, PROCÉDÉS DE FABRICATION ET DE FONCTIONNEMENT DE CELUI-CI, ET APPAREIL ÉLECTRONIQUE COMPRENANT CE DISPOSITIF DE MÉMOIRE RÉSISTIVE
RESISTIVE SPEICHERVORRICHTUNG MIT VERTIKALER STAPELSTRUKTUR, VERFAHREN ZUR HERSTELLUNG UND ZUM BETRIEB DAVON SOWIE ELEKTRONISCHES GERÄT MIT DER RESISTIVEN SPEICHERVORRICHTUNG
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Snippet Disclosed is a resistive memory device (CS) including a vertical stack of memory cells (MC), each memory cell comprising a gate electrode (140), a resistance...
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Title RESISTIVE MEMORY DEVICE INCLUDING VERTICAL STACK STRUCTURE, METHODS OF MANUFACTURING AND OPERATING THE SAME, AND ELECTRONIC APPARATUS INCLUDING THE RESISTIVE MEMORY DEVICE
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