RESISTIVE MEMORY DEVICE INCLUDING VERTICAL STACK STRUCTURE, METHODS OF MANUFACTURING AND OPERATING THE SAME, AND ELECTRONIC APPARATUS INCLUDING THE RESISTIVE MEMORY DEVICE

Disclosed is a resistive memory device (CS) including a vertical stack of memory cells (MC), each memory cell comprising a gate electrode (140), a resistance change layer (124), a (semiconductor transistor) channel (132) between the gate electrode and the resistance change layer, an island structure...

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Bibliographic Details
Main Authors KANG, Jooheon, AHN, Dongho, Yumin, KIM, HYUN, Seungdam, PARK, Garam, SONG, Hyunjae, WOO, Myunghun, KIM, Seyun, YANG, Seungyeul, LEE, Jinwoo
Format Patent
LanguageEnglish
French
German
Published 03.07.2024
Subjects
ELECTRICITY
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Summary:Disclosed is a resistive memory device (CS) including a vertical stack of memory cells (MC), each memory cell comprising a gate electrode (140), a resistance change layer (124), a (semiconductor transistor) channel (132) between the gate electrode and the resistance change layer, an island structure (128) between and in contact with the resistance change layer and the channel, and a gate insulating layer (136) between the gate electrode and the channel. Preferably, the island structure includes SiN, GaN, or an oxide having a greater absolute value of oxide formation energy than the resistance change layer. A method of fabricating such memory cells is also disclosed.
Bibliography:Application Number: EP20230185777