VIA ADJUSTMENT IN INTEGRATED CIRCUITS BASED ON MACHINE LEARNING

• Main Authors: CONNER, Rusty Wayne, KIM, Minjung, THULASI, Sunita S, LEE, Cheng-Tsung, RAGHUNATHAN, Anjan, JONAYAT, A S M, LIONG, Silvia, ALDEN, Dorian, SHENOY, Anish, AGRAWAL, Vipin, SIDDHAMSHETTY, Prashanth Kumar, HORSCH, Mark
• Format: Patent
• Language: English; French; German
• Published: 03.07.2024
• Subjects: APPARATUS SPECIALLY ADAPTED THEREFOR; CALCULATING; CINEMATOGRAPHY; COMPUTING; COUNTING; ELECTRIC DIGITAL DATA PROCESSING; ELECTROGRAPHY; HOLOGRAPHY; MATERIALS THEREFOR; ORIGINALS THEREFOR; PHOTOGRAPHY; PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES; PHYSICS

Methods, apparatus, systems, and articles of manufacture (402) are disclosed to adjust vias (506, 508, 514) in integrated circuits, ICs, based on machine learning, ML. An example apparatus computes a dimension by which to extend a via based on at least one of a first metal wire in a first layer of t...