VIA ADJUSTMENT IN INTEGRATED CIRCUITS BASED ON MACHINE LEARNING

Methods, apparatus, systems, and articles of manufacture (402) are disclosed to adjust vias (506, 508, 514) in integrated circuits, ICs, based on machine learning, ML. An example apparatus computes a dimension by which to extend a via based on at least one of a first metal wire in a first layer of t...

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Bibliographic Details
Main Authors CONNER, Rusty Wayne, KIM, Minjung, THULASI, Sunita S, LEE, Cheng-Tsung, RAGHUNATHAN, Anjan, JONAYAT, A S M, LIONG, Silvia, ALDEN, Dorian, SHENOY, Anish, AGRAWAL, Vipin, SIDDHAMSHETTY, Prashanth Kumar, HORSCH, Mark
Format Patent
LanguageEnglish
French
German
Published 03.07.2024
Subjects
APPARATUS SPECIALLY ADAPTED THEREFOR
CALCULATING
CINEMATOGRAPHY
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTROGRAPHY
HOLOGRAPHY
MATERIALS THEREFOR
ORIGINALS THEREFOR
PHOTOGRAPHY
PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES,e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTORDEVICES
PHYSICS
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Summary:Methods, apparatus, systems, and articles of manufacture (402) are disclosed to adjust vias (506, 508, 514) in integrated circuits, ICs, based on machine learning, ML. An example apparatus computes a dimension by which to extend a via based on at least one of a first metal wire in a first layer of the IC above the via, a via-to-via patterning constraint, or a via-to-metal shorting constraint for a second layer of the IC below the via (520). The example apparatus also computes a shifted position of the via (508) based on at least one of (a) the dimension or (b) a width and a position of a second metal wire below the via, the width and the position predicted by an ML model. Additionally, the example apparatus adjusts a configuration file (510) corresponding to the IC based on at least one of the dimension or the shifted position of the via.
Bibliography:Application Number: EP20230200721