A METHOD FOR FORMING A SEMICONDUCTOR DEVICE WITH A BURIED POWER RAIL

• Main Authors: VELOSO, Anabela, MATAGNE, Philippe, CHEN, Rongmei, ENEMAN, Geert, DE KEERSGIETER, An
• Format: Patent
• Language: English; French; German
• Published: 05.06.2024
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

The disclosure relates to a method for forming a semiconductor device, comprising:forming a transistor structure on a frontside of a substrate, the transistor structure comprising a first and a second source/drain body located in a first and a second source/drain region, respectively, and a channel body comprising at least one channel layer extending horizontally between the first and second source/drain bodies;forming a trench for a buried interconnect beside the first source/drain region, wherein the trench is formed by etching the substrate such that a lower portion of the trench undercuts the first source/drain region;forming a dielectric liner on interior surfaces of the trench;forming an opening in the dielectric liner, underneath the first source/drain region; andsubsequent to forming the opening in the dielectric liner, forming a dummy interconnect of a dummy material in the trench;wherein the method further comprises, subsequent to forming the dummy interconnect:exposing the dummy interconnect from a backside of the substrate;removing the dummy interconnect selectively to the dielectric liner; andforming a buried interconnect of a conductive material in the trench,wherein the buried interconnect is connected to the first source/drain body via the opening in the dielectric liner.