MULTI-CHIP INTERCONNECTION SYSTEM AND METHOD THEREOF

A multi-chip interconnection system includes a plurality of chips. A chip of the plurality of chips includes an extend serial peripheral interface (XSPI) master terminal, a data transmission terminal, an XSPI slave terminal, and a data reception terminal. The XSPI master terminal includes an advance...

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Bibliographic Details
Main Authors YE, Qiaoyu, GONG, Shaohui, ZHANG, Lihang, LIU, Xiongfei
Format Patent
LanguageEnglish
French
German
Published 17.01.2024
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A multi-chip interconnection system includes a plurality of chips. A chip of the plurality of chips includes an extend serial peripheral interface (XSPI) master terminal, a data transmission terminal, an XSPI slave terminal, and a data reception terminal. The XSPI master terminal includes an advanced extensible interface (AXI) slave interface. The data transmission terminal accesses the AXI slave interface via an AXI bus. The XSPI slave terminal includes an AXI master interface. The data reception terminal accesses the AXI master interface via the AXI bus. An XSPI master terminal of a chip is connected to an XSPI slave terminal of another chip via an XSPI bus. The XSPI master terminal of the chip performs encoding on AXI information of the data transmission terminal of the chip received via the AXI bus and transmits encoded AXI information to the XSPI slave terminal of the another chip via the XSPI bus.
Bibliography:Application Number: EP20230164368