TRANSISTOR WITH DIELECTRIC SPACERS AND FIELD PLATE AND METHOD OF FABRICATION THEREFOR

A transistor device includes a semiconductor substrate (110) and a gate structure (128) formed over the substrate. Forming the gate structure may include steps of forming a multi-layer dielectric stack (116, 118, 122) over the substrate, performing an anisotropic dry etch of the multi-layer dielectr...

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Bibliographic Details
Main Author Hill, Darrell Glenn
Format Patent
LanguageEnglish
French
German
Published 08.11.2023
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Summary:A transistor device includes a semiconductor substrate (110) and a gate structure (128) formed over the substrate. Forming the gate structure may include steps of forming a multi-layer dielectric stack (116, 118, 122) over the substrate, performing an anisotropic dry etch of the multi-layer dielectric stack to form a gate channel opening, forming a conformal dielectric layer over the substrate, performing an anisotropic dry etch of the conformal dielectric layer to form dielectric sidewalls (124) in the gate channel opening, etching portions of dielectric layers in a gate channel region, and forming gate metal (128) in the gate channel region. Dielectric spacers (126) may be similarly formed in a field plate channel opening prior to formation of a field plate (132) of the transistor. By forming dielectric spacers in the gate channel opening, the length of the gate structure can be advantageously decreased.
Bibliography:Application Number: EP20230168546