MEMORY, GATE-ALL-AROUND FIELD-EFFECT TRANSISTOR, AND PRODUCING METHOD
This application provides a memory, a gate-all-around field-effect transistor, and a manufacturing method. The memory may include a storage array, at least one source line, at least one word line, and at least one bit line. The storage array includes a plurality of gate-all-around field-effect trans...
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Main Authors | , , , , |
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Format | Patent |
Language | English French German |
Published |
18.10.2023
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Subjects | |
Online Access | Get full text |
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Summary: | This application provides a memory, a gate-all-around field-effect transistor, and a manufacturing method. The memory may include a storage array, at least one source line, at least one word line, and at least one bit line. The storage array includes a plurality of gate-all-around field-effect transistors. The at least one word line is connected to gates of the plurality of gate-all-around field-effect transistors. The at least one source line is connected to sources of the plurality of gate-all-around field-effect transistors. The at least one bit line is connected to drains of the plurality of gate-all-around field-effect transistors. A material of a nanowire of the gate-all-around field-effect transistor is silicon germanium (SiGe). In this application, for a next-generation logic process (for example, a GAA process), a storage array including a gate-all-around field-effect transistor manufactured by using a same process as a logic process is used in a memory, so that the memory can be compatible with the logic process. |
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Bibliography: | Application Number: EP20210918260 |