SUPERCONDUCTING CIRCUIT PREPARATION METHOD AND SUPERCONDUCTING QUANTUM CHIP

• Main Authors: YOU, Bing, MA, Liangliang, WANG, Nianci, ZHENG, Jie, LIU, Wenshu
• Format: Patent
• Language: English; French; German
• Published: 29.05.2024
• Subjects: ELECTRICITY

The present application discloses a fabrication method for a superconducting circuit and a superconducting quantum chip, and belongs to the field of quantum computing technologies. The fabrication method includes: determining, on a substrate, a first junction region located between a first electrical element and a second electrical element, and a second junction region located between a first conductive plate and a second conductive plate that are formed in advance; forming a Josephson junction in the second junction region, and enabling a first superconducting layer and a second superconducting layer of the Josephson junction to be electrically connected to the first conductive plate and the second conductive plate in a one-to-one correspondence manner; connecting the first conductive plate and the second conductive plate to a detection circuit to detect an electrical parameter of the Josephson junction, and determining whether the electrical parameter is within a target parameter range; if yes, separating the Josephson junction from the first conductive plate and the second conductive plate through cutting, and moving the Josephson junction to the first junction region; and forming a first connection structure connecting the first superconducting layer to the first electrical element and a second connection structure connecting the second superconducting layer to the second electrical element. The present application can ensure that a fabricated superconducting circuit meets design requirements.