THREE DIMENSIONAL PROGRAMMABLE LOGIC CIRCUIT SYSTEMS AND METHODS

• Main Authors: GUTALA, Ravi, IYER, Mahesh, BALL, James, DASU, Aravind, SRINIVASAN, Archanna, NURVITADHI, Eriko, WEBER, Scott, ATSATT, Sean
• Format: Patent
• Language: English; French; German
• Published: 28.12.2022
• Subjects: BASIC ELECTRIC ELEMENTS; BASIC ELECTRONIC CIRCUITRY; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; PULSE TECHNIQUE; SEMICONDUCTOR DEVICES

A three dimensional circuit system (100) includes first (101) and second (102) integrated circuit (IC) dies. The first IC die (101) includes programmable logic circuits (16 times 210) arranged in sectors and first programmable interconnection circuits (221, 222) having first router circuits (231, 232). The second IC die (102) includes non-programmable circuits (270-285) arranged in regions and second programmable interconnection circuits (223, 224) having second router circuits (233, 234). Each of the regions in the second IC die (102) is vertically aligned with at least one of the sectors in the first IC die (101). Each of the second router circuits is coupled to one of the first router circuits through a vertical die-to-die connection (255, 258). The first and second programmable interconnection circuits are programmable to route signals between the programmable logic circuits (16 times 210) and the non-programmable circuits (270-285) through the first and second router circuits (231, 232, 233, 234). The circuit system (100) may include additional IC dies (fig. 3: 303, 304). The first and second IC dies (101, 102) and any additional IC dies are coupled in a vertically stacked configuration.