PEER-TO-PEER LINK SHARING FOR UPSTREAM COMMUNICATIONS FROM XPUS TO A HOST PROCESSOR

A processor unit comprising a first controller to couple to a host processing unit over a first link; a second controller to couple to a second processor unit over a second link, wherein the second processor unit is to couple to the host central processing unit via a third link; and circuitry to det...

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Bibliographic Details
Main Authors Puffer, David M, Pal, Rahul, Suthar, Nayan Amrutlal, Jagannathan, Ashok
Format Patent
LanguageEnglish
French
German
Published 28.12.2022
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Summary:A processor unit comprising a first controller to couple to a host processing unit over a first link; a second controller to couple to a second processor unit over a second link, wherein the second processor unit is to couple to the host central processing unit via a third link; and circuitry to determine whether to send a cache coherent request to the host central processing unit over the first link or over the second link via the second processing unit.
Bibliography:Application Number: EP20220165672