POWER LIMITS FOR VIRTUAL PARTITIONS IN A PROCESSOR
In an embodiment, a processor includes multiple processing engines and a power control unit. The power control unit is to receive a mapping of multiple virtual partitions to sets of the processing engines, and in response to a receipt of the mapping of multiple of virtual partitions: access a power...
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Main Authors | , , , , , |
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Format | Patent |
Language | English French German |
Published |
28.12.2022
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Subjects | |
Online Access | Get full text |
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Summary: | In an embodiment, a processor includes multiple processing engines and a power control unit. The power control unit is to receive a mapping of multiple virtual partitions to sets of the processing engines, and in response to a receipt of the mapping of multiple of virtual partitions: access a power limit table for the processor, and generate multiple virtual partition power limit tables based on the power limit table for the processor, where each virtual partition power limit table is associated with a different virtual partition. Other embodiments are described and claimed. |
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Bibliography: | Application Number: EP20220161848 |