MULTICHIP TIMING SYNCHRONIZATION CIRCUITS AND METHODS
In one embodiment, the present disclosure includes multichip timing synchronization circuits and methods. In one embodiment, hardware counters in different systems are synchronized. Programs on the systems may include synchronization instructions. A second system executes synchronization instruction...
Saved in:
Main Authors | , |
---|---|
Format | Patent |
Language | English French German |
Published |
24.11.2021
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | In one embodiment, the present disclosure includes multichip timing synchronization circuits and methods. In one embodiment, hardware counters in different systems are synchronized. Programs on the systems may include synchronization instructions. A second system executes synchronization instruction, and in response thereto, synchronizes a local software counter to a local hardware counter. The software counter on the second system may be delayed a fixed period of time corresponding to a program delay on the first system. The software counter on the second system may further be delayed by an offset to bring software counters on the two systems into sync. |
---|---|
Bibliography: | Application Number: EP20200704136 |