HIGH VOLTAGE SEMICONDUCTOR DEVICES HAVING IMPROVED ELECTRIC FIELD SUPPRESSION
A semiconductor device is provided. The semiconductor device includes an electric field (E-field) suppression layer formed over a termination region. The E-field suppression layer is patterned with openings over metal contact areas. The E-field suppression layer has a thickness such that an electric...
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Main Authors | , , , , |
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Format | Patent |
Language | English French German |
Published |
07.09.2022
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Subjects | |
Online Access | Get full text |
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Summary: | A semiconductor device is provided. The semiconductor device includes an electric field (E-field) suppression layer formed over a termination region. The E-field suppression layer is patterned with openings over metal contact areas. The E-field suppression layer has a thickness such that an electric field strength above the E-field suppression layer is below a dielectric strength of an adjacent material when the semiconductor device is operating at or below a maximum voltage. |
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Bibliography: | Application Number: EP20190897345 |