FIN PATTERNING FOR ADVANCED INTEGRATED CIRCUIT STRUCTURE FABRICATION

Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first silicon fin hav...

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Bibliographic Details
Main Authors MEYER, Heidi M, AUTH, Christopher P, WARD, Curtis, HATTENDORF, Michael L
Format Patent
LanguageEnglish
French
German
Published 22.09.2021
Subjects
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Summary:Embodiments of the disclosure are in the field of advanced integrated circuit structure fabrication and, in particular, 10 nanometer node and smaller integrated circuit structure fabrication and the resulting structures. In an example, an integrated circuit structure includes a first silicon fin having a longest dimension along a first direction. A second silicon fin having a longest dimension is along the first direction. An insulator material is between the first silicon fin and the second silicon fin. A gate line is over the first silicon fin and over the second silicon fin along a second direction, the second direction orthogonal to the first direction, the gate line having a first side and a second side, wherein the gate line has a discontinuity over the insulator material, the discontinuity filled by a dielectric plug.
Bibliography:Application Number: EP20170933856