HIGH VOLTAGE THIN-FILM TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
A high voltage thin-film transistor is specified comprising a gate electrode (G11, G21) in a gate electrode layer (31), a semiconductive channel (C11,C12) in a channel layer (34) parallel to the gate electrode layer and being electrically insulated from the gate electrode by a gate dielectric layer...
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Main Authors | , |
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Format | Patent |
Language | English French German |
Published |
05.08.2020
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Subjects | |
Online Access | Get full text |
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Summary: | A high voltage thin-film transistor is specified comprising a gate electrode (G11, G21) in a gate electrode layer (31), a semiconductive channel (C11,C12) in a channel layer (34) parallel to the gate electrode layer and being electrically insulated from the gate electrode by a gate dielectric layer (32). The transistor further comprises a dominant main electrode and a subordinate main electrode (M11, M12). The main electrodes each have an external portion (M11e, M12e) in a main electrode layer (36) and an internal portion (M11i, M12i) that protrudes through a further dielectric layer (35) between the main electrode layer and the channel layer to electrically contact the semiconductive channel in a dominant main electrode contact area (M11c) and a subordinate main electrode contact area (M12c) respectively. A first distance (D1) is defined between a side of the dominant main electrode contact area facing the subordinate main electrode contact area and a side of the external portion of the dominant main electrode facing the external portion of the subordinate main electrode. A second distance (D2) is defined between a side of the subordinate main electrode contact area facing the dominant main electrode contact area and a side of the external portion of the subordinate main electrode facing the external portion of the dominant main electrode, wherein the first distance is at least twice as large as the second distance. |
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Bibliography: | Application Number: EP20180812322 |