PERIPHERAL BASED MEMORY SAFETY SCHEME FOR MULTI-CORE PLATFORMS
A computing system using low-fat pointers, including: a memory configured to be accessed by the low-fat pointers; a processing core configured to access the memory; an interrupt controller configured to receive interrupts and to communicate interrupts to processes running on the processing core; and...
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Main Authors | , , |
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Format | Patent |
Language | English French German |
Published |
08.11.2023
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Subjects | |
Online Access | Get full text |
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Abstract | A computing system using low-fat pointers, including: a memory configured to be accessed by the low-fat pointers; a processing core configured to access the memory; an interrupt controller configured to receive interrupts and to communicate interrupts to processes running on the processing core; and a memory safety peripheral configured to receive a pointer request, wherein the pointer is a low-fat pointer and to verify that the pointer request is within required memory bounds. |
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AbstractList | A computing system using low-fat pointers, including: a memory configured to be accessed by the low-fat pointers; a processing core configured to access the memory; an interrupt controller configured to receive interrupts and to communicate interrupts to processes running on the processing core; and a memory safety peripheral configured to receive a pointer request, wherein the pointer is a low-fat pointer and to verify that the pointer request is within required memory bounds. |
Author | Medwed, Marcel Nikov, Ventzislav Hoogerbrugge, Jan |
Author_xml | – fullname: Medwed, Marcel – fullname: Nikov, Ventzislav – fullname: Hoogerbrugge, Jan |
BookMark | eNrjYmDJy89L5WSwC3AN8gzwcA1y9FFwcgx2dVHwdfX1D4pUCHZ0cw0BUs4err6uCm7-QQq-oT4hnrrO_kGuCgE-jiFAId9gHgbWtMSc4lReKM3NoADU5uyhm1qQH59aXJCYnJqXWhLvGmBsZmZgbmjkZGhMhBIAGHMrhA |
ContentType | Patent |
DBID | EVB |
DatabaseName | esp@cenet |
DatabaseTitleList | |
Database_xml | – sequence: 1 dbid: EVB name: esp@cenet url: http://worldwide.espacenet.com/singleLineSearch?locale=en_EP sourceTypes: Open Access Repository |
DeliveryMethod | fulltext_linktorsrc |
Discipline | Medicine Chemistry Sciences Physics |
DocumentTitleAlternate | SCHÉMA DE SÉCURITÉ DE MÉMOIRE À BASE PÉRIPHÉRIQUE POUR PLATES-FORMES MULTI-C URS PERIPHERIEBASIERTES SPEICHERSICHERHEITSSCHEMA FÜR MEHRKERNPLATTFORMEN |
ExternalDocumentID | EP3660712B1 |
GroupedDBID | EVB |
ID | FETCH-epo_espacenet_EP3660712B13 |
IEDL.DBID | EVB |
IngestDate | Fri Jul 19 14:00:34 EDT 2024 |
IsOpenAccess | true |
IsPeerReviewed | false |
IsScholarly | false |
Language | English French German |
LinkModel | DirectLink |
MergedId | FETCHMERGED-epo_espacenet_EP3660712B13 |
Notes | Application Number: EP20190200630 |
OpenAccessLink | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231108&DB=EPODOC&CC=EP&NR=3660712B1 |
ParticipantIDs | epo_espacenet_EP3660712B1 |
PublicationCentury | 2000 |
PublicationDate | 20231108 |
PublicationDateYYYYMMDD | 2023-11-08 |
PublicationDate_xml | – month: 11 year: 2023 text: 20231108 day: 08 |
PublicationDecade | 2020 |
PublicationYear | 2023 |
RelatedCompanies | NXP B.V |
RelatedCompanies_xml | – name: NXP B.V |
Score | 3.510101 |
Snippet | A computing system using low-fat pointers, including: a memory configured to be accessed by the low-fat pointers; a processing core configured to access the... |
SourceID | epo |
SourceType | Open Access Repository |
SubjectTerms | CALCULATING COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS |
Title | PERIPHERAL BASED MEMORY SAFETY SCHEME FOR MULTI-CORE PLATFORMS |
URI | https://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20231108&DB=EPODOC&locale=&CC=EP&NR=3660712B1 |
hasFullText | 1 |
inHoldings | 1 |
isFullTextHit | |
isPrint | |
link | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT8IwFH8h-HlT1IBf6cHstsjYBuMwDdtK0DC2wDB4Im3XA5dBZMZ_39dmoBc9tXltmvYlr32_9r1fAR54Jxeezfsmugp902GyZ_Y9aZnK12Yit5jU3J3xpDuaO68Ld1GD1S4XRvOEfmlyRLQogfZe6v1683OJFenYyu0jX6Fo_TzM_Mio0DE6K1bbM6LAp2kSJaERhlgzJlPf7ioitU6AQOlAedGKZp--BSopZfP7RBmewWGKgxXlOdRk0YCTcPfxWgOO4-q9uwFHOkBTbFFYGeH2Ap5SBF_pSEWckWAwoxGJaZxM38lsMKQZFormgBKEdySej7MXM0ymlKTjQYaieHYJBLuFIxOntNwvf0nT_eTtK6gX60I2gTiyx1ybI5pizBHMYXmb527uWIIJ1uV5C1p_DnP9T9sNnCo96nQ77xbq5cenvMNzt-T3WmPfcACCGQ |
link.rule.ids | 230,309,786,891,25594,76904 |
linkProvider | European Patent Office |
linkToHtml | http://utb.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwfV3NT8IwFH8hfuFNUSN-9mB2W2RswDigYVvJ0JUtMAyeSNf1wGUQmfHf97UB9KKnNq9N077kte_XvvcrwEPWzIVrZ10TXYWu6XDZMbuutEzla3ORW1xq7k42aodT52XWmlVgsc2F0TyhX5ocES1KoL2Xer9e_VxiBTq2cv2YLVC0fB6kvcDYoGN0VqyGawRejyZxEPuG72PNGI17dlsRqTU9BEr7HUSEimafvnkqKWX1-0QZnMBBgoMV5SlUZFGDqr_9eK0GR2zz3l2DQx2gKdYo3Bjh-gyeEgRfSagizojXn9CAMMri8TuZ9Ac0xULRHFCC8I6waZQOTT8eU5JE_RRFbHIOBLv5oYlTmu-WP6fJbvL2BewVy0JeAnFkh7fsDNEU547gDs8bWd7KHUtwwdtZXof6n8Nc_dN2D9UwZdE8Go5er-FY6VSn3rk3sFd-fMpbPIPL7E5r7xurm4UE |
openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Apatent&rft.title=PERIPHERAL+BASED+MEMORY+SAFETY+SCHEME+FOR+MULTI-CORE+PLATFORMS&rft.inventor=Medwed%2C+Marcel&rft.inventor=Nikov%2C+Ventzislav&rft.inventor=Hoogerbrugge%2C+Jan&rft.date=2023-11-08&rft.externalDBID=B1&rft.externalDocID=EP3660712B1 |