ELECTRIC DEVICE WAFER
A device wafer with functional device structures, comprises a semiconductor substrate (SU) as a carrier wafer, a piezoelectric layer (PL) arranged on the carrier wafer and functional device structures (DS) of a first and a second type realized by a structured metallization on top of the piezoelectri...
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Main Authors | , |
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Format | Patent |
Language | English French German |
Published |
15.04.2020
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Subjects | |
Online Access | Get full text |
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Summary: | A device wafer with functional device structures, comprises a semiconductor substrate (SU) as a carrier wafer, a piezoelectric layer (PL) arranged on the carrier wafer and functional device structures (DS) of a first and a second type realized by a structured metallization on top of the piezoelectric layer (PL). A space charge region is formed near the top surface of the carrier wafer to yield enhanced electrical isolation between functional device structures (DS) of first and second type. |
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Bibliography: | Application Number: EP20180729941 |