SPUR FREQUENCY ESTIMATION INSIDE DIGITAL PHASE LOCKED LOOP
Systems and methods configured to cancel spurs in a phase locked loop (PLL) system are provided. A method configured to cancel spurs in a PLL system includes receiving a PLL signal from the PLL system; determining an estimated spur frequency of a spur in the received PLL signal based on the received...
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Main Authors | , , |
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Format | Patent |
Language | English French German |
Published |
08.04.2020
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Subjects | |
Online Access | Get full text |
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