STRONGARM LATCH COMPARATOR AND METHOD
A StrongARM latch comparator (500) includes first and second p-type metal-oxide-semiconductor, PMOS, cross-coupled transistors (T1, T2); third and fourth n-type metal-oxide-semiconductor, NMOS, cross-coupled transistors (T3, T4), wherein the first PMOS cross-coupled transistor (T1) has a gate electr...
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Main Authors | , , |
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Format | Patent |
Language | English French German |
Published |
11.03.2020
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Subjects | |
Online Access | Get full text |
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Summary: | A StrongARM latch comparator (500) includes first and second p-type metal-oxide-semiconductor, PMOS, cross-coupled transistors (T1, T2); third and fourth n-type metal-oxide-semiconductor, NMOS, cross-coupled transistors (T3, T4), wherein the first PMOS cross-coupled transistor (T1) has a gate electrically coupled to a gate of the third NMOS cross-coupled transistor (T3) and the second PMOS cross-coupled transistor (T2) has a gate electrically coupled to a gate of the fourth NMOS cross-coupled transistor (T4); and fifth and sixth input transistors (T5, T6). The fifth input transistor (T5) is electrically connected between the first PMOS cross-coupled transistor (T1) and the third NMOS cross-coupled transistor (T3), and the sixth input transistor (T6) is electrically connected between the second PMOS cross-coupled transistor (T2) and the fourth NMOS cross-coupled transistor (T4). |
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Bibliography: | Application Number: EP20180702332 |