THIN-FILM TRANSISTOR EMBEDDED DYNAMIC RANDOM-ACCESS MEMORY WITH SHALLOW BITLINE

• Main Authors: Lajoie, Travis W, Wang, Yih, Ghani, Tahir, Sell, Bernhard, Gardiner, Allen B, Wang, Pei-hua, Ku, Chieh-jen, Alzate-Vinasco, Juan G, Sharma, Abhishek A, Lin, Blake C
• Format: Patent
• Language: English; French; German
• Published: 13.11.2019
• Subjects: BASIC ELECTRIC ELEMENTS; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR; ELECTRICITY; SEMICONDUCTOR DEVICES

Described herein are embedded dynamic random-access memory (eDRAM) memory cells and arrays, as well as corresponding methods and devices. An exemplary eDRAM memory array implements a memory cell that uses a thin-film transistor (TFT) as a selector transistor. One source/drain (S/D) electrode of the TFT is coupled to a capacitor for storing a memory state of the cell, while the other S/D electrode is coupled to a bitline. The bitline may be a shallow bitline in that a thickness of the bitline may be smaller than a thickness of one or more metal interconnects provided in the same metal layer as the bitline but used for providing electrical connectivity for components outside of the memory array. Such a bitline may be formed in a separate process than said one or more metal interconnects. In an embodiment, the memory cells may be formed in a back end of line process.