MEMORY FILTERING FOR DISAGGREGATE MEMORY ARCHITECTURES

Examples may include a data center in which memory sleds are provided with logic to filter data stored on the memory sled responsive to filtering requests from a compute sled. Memory sleds may include memory filtering logic arranged to receive filtering requests, filter data stored on the memory sle...

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Bibliographic Details
Main Authors WILLHALM, Thomas, GUIM BERNAT, Francesc, KUMAR, Karthik, SCHMISSEUR, Mark A
Format Patent
LanguageEnglish
French
German
Published 24.04.2019
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Examples may include a data center in which memory sleds are provided with logic to filter data stored on the memory sled responsive to filtering requests from a compute sled. Memory sleds may include memory filtering logic arranged to receive filtering requests, filter data stored on the memory sled, and provide filtering results to the requesting entity. Additionally, a data center is provided in which fabric interconnect protocols in which sleds in the data center communicate is provided with filtering instructions such that compute sleds can request filtering on memory sleds.
Bibliography:Application Number: EP20180191339