METHOD OF MAKING SPLIT GATE NON-VOLATILE FLASH MEMORY CELL

A method of forming a non-volatile memory cell on a substrate having memory cell and logic circuit regions by forming a pair of conductive floating gates in the memory cell region, forming a first source region in the substrate between the pair of floating gates, forming a polysilicon layer in both...

Full description

Saved in:
Bibliographic Details
Main Authors LIU, Andy, WANG, Chunming, DIAO, Melvin, XING, Leo, LIU, Xian, DO, Nhan
Format Patent
LanguageEnglish
French
German
Published 01.04.2020
Subjects
Online AccessGet full text

Cover

Loading…
More Information
Summary:A method of forming a non-volatile memory cell on a substrate having memory cell and logic circuit regions by forming a pair of conductive floating gates in the memory cell region, forming a first source region in the substrate between the pair of floating gates, forming a polysilicon layer in both regions, forming an oxide layer over the polysilicon layer in the logic circuit region, performing a chemical-mechanical polish of the polysilicon layer in the memory cell area leaving a first block of the polysilicon layer between the floating gates that is separated from remaining portions of the polysilicon layer, and selectively etching portions of the polysilicon layer to result in: second and third blocks of the polysilicon layer disposed in outer regions of the memory cell area, and a fourth block of the polysilicon layer in the logic circuit region.
Bibliography:Application Number: EP20170799842