INTELLIGENT BIT LINE PRECHARGE FOR REDUCED DYNAMIC POWER CONSUMPTION

A method and apparatus for writing data to a memory device are provided that do not change the precharge states for a bit line pair in a current write cycle if the current data bit is unchanged from the preceding write cycle.

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Bibliographic Details
Main Authors PALLERLA, Arun Babu, CHABA, Ritu
Format Patent
LanguageEnglish
French
German
Published 06.02.2019
Subjects
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A method and apparatus for writing data to a memory device are provided that do not change the precharge states for a bit line pair in a current write cycle if the current data bit is unchanged from the preceding write cycle.
Bibliography:Application Number: EP20170713525