POWER SAVING SYSTEMS AND METHODS FOR UNIVERSAL SERIAL BUS (USB) SYSTEMS

Power saving systems and methods for Universal Serial Bus (USB) systems are disclosed. When a USB physical layer (PHY) enters a U3 low power state, not only are normal elements powered down, but also circuitry within the USB PHY associated with detection of a low frequency periodic signal (LFPS) wak...

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Bibliographic Details
Main Authors WINEMILLER, Chad, Everett, DEANS, Russell, Coleman, ZHU, Zhi, BOYETTE, Jon, Raymond
Format Patent
LanguageEnglish
French
German
Published 06.02.2019
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Power saving systems and methods for Universal Serial Bus (USB) systems are disclosed. When a USB physical layer (PHY) enters a U3 low power state, not only are normal elements powered down, but also circuitry within the USB PHY associated with detection of a low frequency periodic signal (LFPS) wake up signal is powered down. A low speed reference clock signal is still received by the USB PHY, and a medium speed clock within the USB PHY is activated once per period of the low speed reference clock signal. The medium speed clock activates the signal detection circuitry and samples a line for the LFPS. If no LFPS is detected, the signal detection circuitry and the medium speed clock return to low power until the next period of the low speed reference clock signal. If the LFPS is detected, the USB PHY returns to a U0 active power state.
Bibliography:Application Number: EP20170720341