STACKED MEMORY CHIP DEVICE WITH ENHANCED DATA PROTECTION CAPABILITY

A stacked memory chip device is described. The stacked memory chip device includes a plurality of stacked memory chips. The stacked memory chip device includes read/write logic circuitry to service read/write requests for cache lines kept within the plurality of stacked memory chips. The stacked mem...

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Bibliographic Details
Main Authors AGARWAL, Rajat, WU, Wei, ALAMEER, Hussein, HALBERT, John B, CRISS, Kjersten E, KANG, Uksong
Format Patent
LanguageEnglish
French
German
Published 09.02.2022
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Summary:A stacked memory chip device is described. The stacked memory chip device includes a plurality of stacked memory chips. The stacked memory chip device includes read/write logic circuitry to service read/write requests for cache lines kept within the plurality of stacked memory chips. The stacked memory chip device includes data protection circuitry to store information to protect substantive data of cache lines in the plurality of stacked memory chips, where, the information is kept in more than one of the plurality of stacked memory chips, and where, any subset of the information that protects respective substantive information of a particular one of the cache lines is not stored in a same memory chip with the respective substantive information.
Bibliography:Application Number: EP20180175275