MEMORY DEVICES AND SYSTEMS HAVING REDUCED BIT LINE TO DRAIN SELECT GATE SHORTING AND ASSOCIATED METHODS

3D NAND memory devices and systems having reduced bit line to drain select gate shorting, including associated methods, are provided and described.

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Bibliographic Details
Main Authors FAZIL, Damir, NARAYANAN, Purnima, ZHU, Hongbin, HALLER, Gordon, ZHAO, Jun
Format Patent
LanguageEnglish
French
German
Published 06.07.2022
Subjects
ELECTRICITY
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Summary:3D NAND memory devices and systems having reduced bit line to drain select gate shorting, including associated methods, are provided and described.
Bibliography:Application Number: EP20160806365