SYSTEMS AND METHODS FOR DYNAMICALLY ADJUSTING MEMORY STATE TRANSITION TIMERS

Systems, methods, and computer programs are disclosed for dynamically adjusting memory power state transition timers. One embodiment of a method comprises receiving one or more parameters impacting usage or performance of a memory device coupled to a processor in a computing device. An optimal value...

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Bibliographic Details
Main Authors ROH, Keunsoo, PARK, Hee Jun, LO, Haw-Jing
Format Patent
LanguageEnglish
French
German
Published 13.04.2022
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:Systems, methods, and computer programs are disclosed for dynamically adjusting memory power state transition timers. One embodiment of a method comprises receiving one or more parameters impacting usage or performance of a memory device coupled to a processor in a computing device. An optimal value is determined for one or more memory power state transition timer settings. A current value is updated for the memory power state transition timer settings with the optimal value.
Bibliography:Application Number: EP20160751453