MEMORY PROTECTION KEY ARCHITECTURE WITH INDEPENDENT USER AND SUPERVISOR DOMAINS

A processing system includes a processing core to execute a task and a memory management unit, coupled to the core. The memory management unit includes a storage unit to store a page table entry including one or more identifiers of memory frames, a protection key, and an access mode bit indicating w...

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Bibliographic Details
Main Authors NEIGER, Gilbert, ANDERSON, Andrew, V, DULLOOR, Subramanya, R, NUZMAN, Joseph, HAAS, Werner, KOUFATY, David, A, SANKARAN, Rajesh, M
Format Patent
LanguageEnglish
French
German
Published 03.07.2019
Subjects
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Summary:A processing system includes a processing core to execute a task and a memory management unit, coupled to the core. The memory management unit includes a storage unit to store a page table entry including one or more identifiers of memory frames, a protection key, and an access mode bit indicating whether the one or more memory frames are accessible according to a user mode or according to a supervisor mode, a first permission register including a plurality of fields, each field comprising a set of bits reflecting a set of memory access permissions under the user mode, and a second permission register storing a plurality of fields, each field comprising a set of bits reflecting a set of memory access permissions under the supervisor mode.
Bibliography:Application Number: EP20150851712