SEMICONDUCTOR APPARATUS AND IDENTIFICATION METHOD OF A SEMICONDUCTOR CHIP

A semiconductor apparatus including a semiconductor chip is disclosed. The semiconductor chip includes a modular region and a test circuit. The modular region includes a plurality of modular areas each including a memory cell array with redundant bit lines and a peripheral memory area storing at lea...

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Bibliographic Details
Main Authors WATANABE, Hiroshi, SHIROTA, Riichiro, NAGAI, Yukihiro
Format Patent
LanguageEnglish
French
German
Published 09.08.2017
Subjects
Online AccessGet full text

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Summary:A semiconductor apparatus including a semiconductor chip is disclosed. The semiconductor chip includes a modular region and a test circuit. The modular region includes a plurality of modular areas each including a memory cell array with redundant bit lines and a peripheral memory area storing at least redundant addresses. The test circuit retrieves the redundant addresses intrinsic to the semiconductor chip. The distribution of the redundant addresses is randomly formed related to a part or a whole of the modular area of the modular region. The test circuit outputs a random number generated from physical properties intrinsic to the semiconductor chip according to a specification code {a} received from a physical-chip-identification measuring device.
Bibliography:Application Number: EP20170153235