GATE DRIVE CIRCUIT AND DISPLAY DEVICE USING THE SAME

• Main Authors: SHIM, Dahye, CHO, Youngsung, CHOI, Joungmi, KIM, Jiah
• Format: Patent
• Language: English; French; German
• Published: 01.02.2017
• Subjects: ADVERTISING; ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICESUSING STATIC MEANS TO PRESENT VARIABLE INFORMATION; CRYPTOGRAPHY; DISPLAY; EDUCATION; PHYSICS; SEALS

A gate drive circuit (GIP) and a display device using the same are provided. The gate drive circuit (GIP) comprises: a pull-up transistor (T7) that charges an output node to the voltage of a first clock signal (CLK(N)) input through a first clock node in accordance with the voltage of a Q node (Q); an inverter circuit (T4, T5) that controls the voltage of the Q node (Q) in response to a second clock signal (CLK(N-2)) input through a second clock node; and a capacitor (C) that supplies the voltage of the second clock signal (CLK(N-2)) to an input node (INV) of the inverter circuit (T4, T5). The present invention allows for stabilization of the Q node voltage and the output node voltage (GOUT(N)) as the floating period of the Q node (Q) is reduced by connecting an inverter circuit (T4, T5) for receiving clock signals to the Q node (Q) and supplying the clock signals to the inverter circuit (T4, T5) through capacitor coupling.