CIRCUITS AND METHODS FOR IMPROVED QUALITY FACTOR IN A STACK OF TRANSISTORS

Circuits and method for improved quality factor in a stack of transistors. A switching device can include a plurality of field-effect transistors (FETs) implemented in a stack configuration. The switching device can further include a bias circuit having a distribution network that couples a bias inp...

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Bibliographic Details
Main Author BLIN, Guillaume Alexandre
Format Patent
LanguageEnglish
French
German
Published 04.01.2023
Subjects
BASIC ELECTRIC ELEMENTS
BASIC ELECTRONIC CIRCUITRY
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
PULSE TECHNIQUE
SEMICONDUCTOR DEVICES
TRANSMISSION
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Summary:Circuits and method for improved quality factor in a stack of transistors. A switching device can include a plurality of field-effect transistors (FETs) implemented in a stack configuration. The switching device can further include a bias circuit having a distribution network that couples a bias input node to the gate of each FET. The distribution network can include a plurality of first nodes, with each first node connected to one or more of the gates through one or more respective resistive paths. The distribution network can further include one or more second nodes, with each second node connected to one or more of the first nodes through one or more respective resistive paths. At least some of the resistive paths can have resistance values selected to reduce loss of a radio-frequency (RF) signal when the FETs are in an OFF state.
Bibliography:Application Number: EP20140861506