THIN FILM TRANSISTOR ARRAY AND PRODUCTION METHOD THEREFOR
A thin film transistor array provided with thin film transistors arranged in a matrix. Each of the thin film transistor includes a gate electrode formed on a substrate; a gate insulation layer formed on the gate electrode; a source electrode and a drain electrode connected to a pixel electrode, form...
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Main Author | |
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Format | Patent |
Language | English French German |
Published |
07.06.2017
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Subjects | |
Online Access | Get full text |
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Summary: | A thin film transistor array provided with thin film transistors arranged in a matrix. Each of the thin film transistor includes a gate electrode formed on a substrate; a gate insulation layer formed on the gate electrode; a source electrode and a drain electrode connected to a pixel electrode, formed on the gate insulation layer; a semiconductor layer formed between the source electrode and the drain electrode; an interlayer insulation film formed so as to cover the source electrode, the drain electrode, the semiconductor layer and a part of the pixel electrode; and an upper pixel electrode formed on the interlayer insulation film, the upper pixel electrode being connected to the pixel electrode. The gate electrode is connected to a gate wiring and the source electrode is connected to a source wiring and the interlayer insulation film has a concave portion. |
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Bibliography: | Application Number: EP20140847642 |