TRANSCEIVER WITH ASYMMETRIC MATCHING NETWORK
A system on a chip (SoC) includes a transceiver comprising a transmitter and a receiver, wherein at least one of the transmitter and receiver has a configurable portion that can be configured to operate in a single ended mode and in a differential mode. Two interface pins are provided for coupling t...
Saved in:
Main Authors | , , , , |
---|---|
Format | Patent |
Language | English French German |
Published |
13.07.2022
|
Subjects | |
Online Access | Get full text |
Cover
Loading…
Summary: | A system on a chip (SoC) includes a transceiver comprising a transmitter and a receiver, wherein at least one of the transmitter and receiver has a configurable portion that can be configured to operate in a single ended mode and in a differential mode. Two interface pins are provided for coupling the transceiver to an antenna via a matching network, wherein the two interface pins are shareably coupled to the transmitter and to the receiver. A tunable capacitor is coupled to differential signal lines of the configurable portion, wherein the tunable capacitor is configured to be tuned to optimize impedance matching of the configurable portion for each mode of operation. |
---|---|
Bibliography: | Application Number: EP20140743822 |